The Ideal Array Language for 2025: A Response to Hardware Heterogeneity

Traditional programming language assumptions no longer hold true in the face of increasingly heterogeneous hardware (multi-core, multi-node, GPUs, FPGAs, etc.). This post explores the design of an ideal array language, emphasizing rank polymorphism, the ability to write kernels directly, and value semantics with automatic buffer management. The author argues that a functional, unbuffered array programming model, coupled with compiler infrastructure like MLIR, better leverages hardware capabilities. User experience is enhanced through friendly compiler optimization reporting. Fortran and APL are cited as inspirational languages.