AMD Trinity's Compromised Interconnect: A Decade of iGPU Integration

2025-06-17
AMD Trinity's Compromised Interconnect: A Decade of iGPU Integration

This article delves into the memory interconnect architecture of AMD's Trinity APU (released in 2012). Unlike the later Infinity Fabric, Trinity uses two distinct links, "Onion" and "Garlic," to connect the CPU and iGPU. "Onion" guarantees cache coherency but is bandwidth-limited, while "Garlic" offers high bandwidth but lacks coherency. This design reflects a compromise based on the then-current Athlon 64 architecture, resulting in performance penalties when the CPU and GPU access each other's memory. While performing adequately for graphics workloads like gaming, Trinity's architecture lacks the elegance and efficiency of Intel's Sandy Bridge/Ivy Bridge integrated iGPUs. The author uses tests and data analysis to detail the functionality, advantages, and disadvantages of both links, demonstrating Trinity's memory bandwidth usage with various games and image processing programs.

Hardware Interconnect