Linear Pluggable Optics (LPO): The Next Big Thing in Data Center Power Efficiency?

2025-03-08
Linear Pluggable Optics (LPO): The Next Big Thing in Data Center Power Efficiency?

Linear pluggable optics (LPO) is gaining traction as a solution for fast, efficient data movement in and out of server racks. However, a lack of standardization for connecting optical modules is hindering wider adoption, despite growing pressure to reduce data center power consumption. While less power-efficient than co-packaged optics (CPO), LPO offers better thermal protection. The Optical Internetworking Forum (OIF) is developing electrical standards to improve interoperability, paving the way for broader LPO deployment and enhanced data center energy efficiency.

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GPU-Accelerated Computational Lithography: From Days to Hours

2025-03-07
GPU-Accelerated Computational Lithography: From Days to Hours

Modern semiconductor manufacturing faces immense computational challenges, particularly in lithography for deep submicron chips. Traditional OPC techniques are limited by computational power, while ILT, though more flexible, demands massive resources, potentially utilizing thousands of CPU cores for days. To address this, NVIDIA, TSMC, and Synopsys collaborated to migrate lithography code from CPUs to GPUs, achieving significant speedups. By optimizing algorithms and leveraging GPU parallelism, they reduced ILT computation time from multiple days to under a day, achieving over a 15x speed increase. This breakthrough promises to greatly advance the semiconductor industry.

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Impact of Extremely Low Temperatures on 5nm SRAM Array Size and Performance

2025-01-24
Impact of Extremely Low Temperatures on 5nm SRAM Array Size and Performance

New research explores the effects of extremely low temperatures (down to 10K) on the size and performance of 5nm FinFET SRAM arrays. Researchers found that at cryogenic temperatures, the maximum array size is limited by wordline parasitics, not leakage current, and performance is governed by both bitline and wordline parasitics. This has significant implications for future low-power, high-performance computing, offering valuable insights for optimizing SRAM arrays in extremely cold environments.

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Testing for Thermal Issues in Advanced Packages Becomes Increasingly Challenging

2024-12-21
Testing for Thermal Issues in Advanced Packages Becomes Increasingly Challenging

The increasing complexity and heterogeneity of chip architectures, coupled with the adoption of high-performance materials, are making it significantly more difficult to identify and test for thermal issues in advanced packages. Traditional corner-based thermal testing is insufficient due to unpredictable chip-level thermal effects and varying heat distribution under different workloads. Heterogeneous integration, thinner substrates and metal layers, and diverse materials and interconnect schemes all contribute to this complexity. To address these challenges, the industry is exploring advanced thermal modeling, test structures, adaptive testing strategies, and AI to achieve more accurate thermal characterization and reliable device testing.

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Heat Accelerates Auto Chip Aging, Raising Safety Concerns

2024-12-18
Heat Accelerates Auto Chip Aging, Raising Safety Concerns

New research shows that automotive chips are aging significantly faster than expected in hot climates, shortening the lifespan of electric vehicles and potentially creating new safety issues. In areas like Phoenix, Arizona, where high temperatures can persist for weeks, cabin temperatures can reach 93°C, severely impacting chip longevity. Studies reveal that for a chip designed for a 30-year lifespan, high temperatures reduce life expectancy by an additional 10% annually. Chipmakers are working to address this, requiring new materials, design redundancy, and active cooling solutions. Increased chip utilization due to autonomous driving exacerbates the problem. Proactive monitoring and predictive failure analysis will become crucial, impacting both vehicle reliability and safety.

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