Intel Xe3 Architecture Deep Dive: Significant Improvements Target High-End Market
2025-03-19
Details of Intel's Xe3 GPU architecture have emerged, with software development visible across several open-source repositories. Xe3 boasts a potential maximum of 256 Xe Cores, significantly more than its predecessor, supporting up to 32,768 FP32 lanes. Improvements include 10 concurrent threads per XVE, flexible register allocation, increased scoreboard tokens, and a new gather-send instruction. Additionally, Xe3 introduces Sub-Triangle Opacity Culling (STOC), which subdivides triangles to reduce wasted shader work, enhancing ray tracing performance. These advancements bring Intel's architecture closer to AMD and Nvidia's in terms of performance and efficiency, signaling Intel's ambition in the high-end GPU market.
Hardware
GPU Architecture